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How to calculate all VESA timings in VHDL for one of our universal VGA timing modules

lingyueqing

New Member
Most video resolutions like VGA (640x480), UXGA (1600x1200) or HD720 (1280x720) are defined by VESAs Coordinated Video Timing (CVT) standard. (It can be freely downloaded from VESA.org).

The download results in an Excel sheet, where one can enter the display resolution and several properties like reduced blanking. After that, the Excel sheets prints out the results like Pixel Clock, H-Front-Porch, H-Back-Porch or VSync polarity.

I would like to get the equations, so I can calculate all VESA timings in VHDL for one of our universal VGA timing modules.

I also found a Display Monitor Timing (DMT) document that lists all timings, but unfortunately no equations.The monitor is found from Kynix:http://www.kynix.com/

Alternative Solution:
How can I enter all known video resolutions into the Excel sheet and export the results into a file. I don't want to enter them manually.

Appendix:


Known display resolutions. Source: wikimedia.org.
 
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